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iWave iW-RainboW-G47V KU19P Kintex UltraScale+ 3U VPX Plug-In Module

iWave iW-RainboW-G47V KU19P Kintex UltraScale+ 3U VPX Plug-In Module

Zynq-US-SOM-Based-VPX-Plug-in-Module-Side-View-768x496 (1)

3U-VPX-Plug-in-Module-TOP-View-768x447 (1)

iWave iW-RainboW-G47V KU19P Kintex UltraScale+ 3U VPX Plug-In Module

AMD Xilinx’s KU19P, KU095, KU115 Kintex UltraScale+ FPGA
Dual 64 bit, 4GB FPGA-DDR4 with ECC (Upgradable)
31 channels of FPGA GTY transceivers up to 32.75Gbps¹
Dual ARM Cortex-A7 core processor of 1.2GHz speed
32bit 2GB DDR4 for CPU with ECC
128MB QSPI Flash & 256MB NOR Flash
3U VPX Connectors based on ANSI/VITA 46.30 (P0+P1A & P1B+P2A)
8 Optical transceivers through MT Ferrule Connector (P2B) based on VITA66.4

SKU: iWave iW-RainboW-G47V KU19P Kintex UltraScale+ 3U VPX Plug-In Module

Opis

Description

Karta katalogowa Manual

On-Board Features

KU19P/KU095/KU115 – Kintex UltraScale+	Programming Logic (FPGA) Up to 1,842K Logic Cells & 842.4K LUTs
LS1021A – Arm CPU	Arm^® Cortex^®-A7 MPCore compliant with Armv7-A™ architecture Dual-core Cortex^®-A7 Cores running up to 1.2GHz
RAM Memory	PL/FPGA: Dual 64bit, 4GB DDR4 RAM (expandable up to 16GB) Arm CPU: 32bit, 2GB DDR4 RAM with ECC
On Board Flash/Storage	16bit, 256MB NOR Flash 16bit, 4MB MRAM 512KB SRAM
FPGA to CPU Interface	RGMII UART PCIe x1 Gen2¹

3U VPX Backplane Features

3U VPX Connector (P0+P1A)

Data Plane Port
- DP01[3:0] – 1G/2.5G/10G Ethernet or PCIe Gen4 (using PL GTY Transceivers @ Upto 16Gbps/lane)
Data Switch Port
- DS01[3:0] – 1G/2.5G/10G Ethernet or PCIe Gen4 (using PL GTY Transceivers @ Upto 16Gbps/lane)
Utility Plane
- System Control Signals (SYSRESET, NVMRO, SYS_CON, SM Bus, Geographic Address Field, JTAG)
- System Reference Clocks (REF_CLK, AUX_CLK)
- Bussed GPIO (GDiscrete1)
- Power Input (12V VDC, 3.3V_AUX, VBAT)

3U VPX Connector (P1B+P2A)

Data Plane Port
- DP02[3:0] – 1G/2.5G/10G Ethernet (using GTY Transceivers @ Upto 16Gbps/lane)
- DP03[3:0] – 1G/2.5G/10G Ethernet (using GTY Transceivers @ Upto 16Gbps/lane)
Control Plane Port
- CPutp[6:0] – 1G/2.5G/10G/25G Ethernet (using GTY Transceivers @ Upto 25Gbps/lane)
- CSutp01 – 1G/2.5G/10G/25G Ethernet (using GTY Transceivers @ Upto 25Gbps/lane)
Utility Port
- System Control Signals (Maskable Reset)
Maintenance Port
- MP01 and MP02

MT Ferrule Optical Connector – P2B

8 Fiber Optical Transceiver using two Firefly Connector (using GTY Transceivers @ Upto 28.125Gbps)¹

3U VPX Front Panel Features

USB3.0 & USB 2.0 through USB Type-C Connector x 1
10/100/1000Mbps Ethernet through 9 Pin Header x 1
3 Pin Debug UART Header x 1

Other On-Board Features

PCIe Gen2 x 1 through M.2(Key-M) Connector x 1
Temperature Sensor
Elapse Time Counter
Quad User LEDs
Reset Switch
Clock Synthesizer and Clock Buffers for GTY Transceiver Reference clocks

General Specification

Slot Pitch	1 Inch Conduction Cooled
Power Supply	+12VDC +/- 5% input from VPX Connector
Form Factor	3U VPX (160mm X 100mm)

¹ By default one GTY transceiver channel is connected with on-SOM PCIe transceiver.

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